1. Field of the Invention
The present invention relates to a method for driving an AC-driven plasma display panel (PDP) and also relates to a plasma display device to which the method applies.
2. Description of Related Art
A PDP is a flat display device of a self-luminous type having a pair of substrates as a support. Since the PDP capable of color display was put to practical use, the PDP has wider applications, for example as a display of television pictures or a monitor of a computer. The PDP is now attracting attention also as a large, flat display device for high-definition TV.
The AC-driven PDP is a PDP constructed to have main electrodes covered with a dielectric to allow a so-called memory function of maintaining light-emission discharges for display by utilizing wall charge. For producing an image with the PDP, row by row addressing is carried out to form a charged state only in cells which are to emit light for display, and then a sustain voltage Vs for sustaining the light-emission discharges of alternating polarities is applied to all cells. The sustain voltage VS satisfies the following formula (1): EQU Vf-Vwall&lt;Vs&lt;Vf Formula (1)
wherein Vf is a firing voltage, i.e., a discharge at start voltage, and Vwall is a wall voltage.
In cells having the wall charge, the wall voltage is superposed on the sustain voltage Vs, and therefore an effective voltage Veff present in the cells, which is also called a cell voltage, exceeds the firing voltage Vf to generate an electric discharge. If the sustain voltage Vs is applied at sufficiently short cycles, apparently continuous light emission can be obtained. Luminance of display depends on the number of discharges generated per unit time. Accordingly, gradation display (display of gray scales) is reproduced by setting a proper number of discharges per field (per frame in the case of non-interlaced scanning) for every cell in accordance with desired gradation levels. Color display is a kind of gradation display, and colors are produced by combining three primary colors with changing luminance of the colors.
For performing gradation display with the PDP, it is generally known from Japanese Unexamined Patent Publication No. HEI 4(1992)-195188 that one field is divided into a plurality of sub-fields each having aweighted luminance, i.e., number of discharges, and the total number of discharges in one field is set by deciding light emission or non-light-emission in each of the sub-fields. In general, the luminance of the sub-fields is weighted by so-called "binary weighting" which lays weights represented by 2.sup.n wherein n=0, 1, 2, 3, . . . . For example, if the number of sub-fields is eight, 256 levels of gradation, i.e., gradation level "0" to gradation level "255," can be displayed.
The binary weighting is suitable for multi-gradation. However, in order to uniform a difference in luminance corresponding to one level of gradation (hereafter referred to as a gradation difference) all over a total range of gradation, addressing must be carried every sub-field, and resetting (preparation for the addressing) must also be carried out for forming a uniformly charged state on an entire screen prior to the addressing of each sub-field. If the resetting is not performed, cells having residual wall charge, i.e., cells having been selected to have light-emission discharges for display in the preceding sub-field, are different in dischargeability from other cells, i.e., cells not having been selected for display in the preceding sub-field. Therefore it is difficult to carry out the addressing with reliability. Since the resetting and addressing involve an electric discharge, it is desirable that the number of resettings and addressings be reduced for good contrast and reduction of electric power consumption. Especially in the case of a high-definition PDP, it is earnestly desired also for the purpose of preventing the generation of heat that the number of addressings be reduced since a load on a circuit components for the addressing is large.
For this purpose, Japanese Patent No. 2639311 proposes a method for driving a PDP wherein a number of sub-fields are grouped into a plurality of groups, sub-fields belonging to the same group are equally weighted and the resetting is carried out once for every group of sub-fields.
FIG. 8 is a schematic view illustrating the conventional driving method.
In the example of FIG. 8, a field f is composed of nine sub-fields sf1 to sf9, which are grouped into three groups sfg1 to sfg3 each consisting of three sub-fields. Sub-fields sf1 to sf3 belonging to a first sub-field group sfg1 are each weighted by one, sub-fields sf4 to sf6 belonging to a second sub-field group sfg2 are each weighted by four, and sub-fields sf7 to sf9 belonging to a third sub-field group sfg3 are each weighted by sixteen. With this construction of the field, 64 levels of gradation, i.e., level "0" to level "63," can be displayed. Each of the sub-fields sf1 to sf9 is provided with an address period ta for the addressing and a sustain period ts, which is also referred to as a display period, for sustaining light-emission discharges. Each of the sub-field groups sfg1 to sfg3 is provided with a reset period tr for the resetting. The length of the address period is constant in all the sub-fields, i.e., a product of a scanning cycle per row and the number of the rows, while the sustain period ts is longer as a larger weight of luminance is put on the sustain period.
Conventionally, the resetting is performed by a charge erasing operation of eliminating residual wall charge and thereby rendering the entire screen into an uncharged state, and the addressing is performed by a selective writing operation of selecting only cells which are to emit light for display and forming new wall charge in the selected cells.
For example, in order to produce the gradation level "3," a cell may be selected to emit light during the sustain periods ts of the three sub-fields sf1 to sf3 whose luminances are each weighted by one. In this case, the entire screen is cleared of electric charge in the reset period tr of the first sub-field group sfg1, and the cell is written to form wall charge in the address period ta of the first sub-field sf1. This cell is not written in the address periods ta of the second and third sub-fields sf2 and sf3, but the light-emission discharges are sustained by use of remaining wall charge in the sustain periods TS of the sub-fields sf2 and sf3. Then, the wall charge is eliminated in the reset period tr of the second sub-field group sfg2 and thus the cell falls in a non-selected state wherein the cell does not generate a discharge on the application of a sustain voltage for sustaining the light-emission discharge. In order to reproduce the gradation level "2" in a cell, the cell is written in the address period ta of the second sub-field sf2 and the cell emits light in the sustain periods ts of the second and third sub-fields sf2 and sf3.
With this construction in which the timing of writing is varied in each of the sub-fields groups sfg1 to sfg3 according to a gradation level to be reproduced, the number of resettings can be reduced to the number of sub-field groups and the number of address writings in each cell can reduced equal to or less than the number of sub-field groups. Since the addressing here is of a write method, the addressing is not required when the gradation level to be reproduced is "0."
With the conventional driving method, however, a priming effect of space charge generated by the discharge for the resetting is large when the addressing immediately follows the resetting, while the priming effect becomes smaller as the interval between the resetting and the addressing becomes longer because the space charge decreases. Thus the incidence of discharge defects becomes high. That is, the production of a gradation level which requires light emission in only a few sub-fields of the sub-field groups sfg1 to sfg3 is not ensured. For this reason, it is difficult to increase the number of sub-fields belonging to each of the sub-field groups sfg1 to sfg3 thereby to increase the number of gradation levels to display without increasing power consumption for the addressing. In addition to that, the cycle for scanning a row must be set to a relatively large value of about 3.7 .mu.s so that a necessary amount of wall charge is formed by the addressing. Therefore, in the case where the number of rows is 480, for example, one addressing requires about 1.78 ms and the maximum number of addressings that can be done in one field time (about 16.7 ms) is nine.